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test and measurement products 1 www.semtech.com E7765 1.3 ghz quad pin electronics driver description features functional block diagram applications revision 11 / july 18, 2006 the E7765 four channel, monolithic ate pin electronics solutions manufactured in a high-performance complementary bipolar process. the E7765 power consumption can be minimized to ac- commodate the required performance and levels. the E7765 has bias and other inputs that provide a means to adjust performance versus power consumption. the E7765 operates at data rates up to 1.3 ghz/2.6 gbps. the power supplies to the E7765 are specified over a wide range to accommodate between ?2v, +7v and ?0.5v, +4.2v output voltage ranges. the E7765 driver is capable of generating 8v swings over a ?2 to +7v range. the driver minimum swing is 100 mv. a differential driver mode configures pairs of adjacent driv- ers on-chip to drive differential signals from a single data input. the driver pairs are dout[0]:dout[1] and dout[2]:dout[3]. the on-chip distribution of the driving signal and the close matching of performance on-chip will result in very low skew for differential output to output. ? memory testers ? companion chip to e7725 as drive-only channels ? programmable clock drivers ? test instruments ? four fully integrated, three-statable drivers ? wide choice of range, performance vs. power ? differential driver mode ? programmable driver rise, fall times ? ?2v, +7v driver voltage range ? small, 80-pin lqfp package dbias radj fadj dout fadj radj cathod e dout dbias anode dvh dvh den den* den den* pon pon dvl dvl dhi dhi* dhi dhi* sel_dhi sel de de dh dh channel 0 channel 1 dbias radj fadj dout fadj radj dout dbias dvh dvh den den* den den* pon pon dvl dvl dhi dhi* dhi dhi* sel_dhi sel de de dh dh channel 2 channel 3
2 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 pin description [0:3] r [0:3] r [0:3] r [0:3] r [0:3] r ef ef ef ef ef er er er er er s t s t s t s t s t o channels 0, 1 o channels 0, 1 o channels 0, 1 o channels 0, 1 o channels 0, 1 , 2 or 3 , 2 or 3 , 2 or 3 , 2 or 3 , 2 or 3 note 1: all vees must be connected, externally, to the same supply. all vccs must be connected, externally, to the same supply. all gnds must be connected, externally. # n i pe m a n n i pn o i t p i r c s e d r e v i r d ; 5 4 , 4 4 ; 7 5 , 6 5 7 1 , 6 1 ; 5 , 4 ] 3 : 0 [ t u o d. t u p t u o r e v i r d 2 1 , 9 , 9 4 , 2 5 3 1 , 8 , 8 4 , 3 5 ] 3 : 0 [ i h d ] 3 : 0 [ * i h d w o l r o h g i h r e v i r d e h t t c e l e s h c i h w s n i p l a t i g i d t u p n i l a i t n e r e f f i d " x e l f " . l e v e l 0 3 , 1 7 , 1 3 , 0 7 9 2 , 2 7 , 2 3 , 9 6 ] 3 : 0 [ n e d ] 3 : 0 [ * n e d e v i t c a g n i e b t u p t u o r e v i r d e h t l o r t n o c h c i h w s n i p t u p n i l a i t n e r e f f i d " x e l f " . e t a t s e c n a d e p m i h g i h a n i r o 4 2 , 7 7 , 7 3 , 4 6 5 2 , 6 7 , 6 3 , 5 6 ] 3 : 0 [ h v d ] 3 : 0 [ l v d h g i h r e v i r d e h t e n i m r e t e d h c i h w s t u p n i e g a t l o v g o l a n a e c n a d e p m i h g i h . s l e v e l w o l d n a 7 2 , 4 7 , 4 3 , 7 6 8 2 , 3 7 , 3 3 , 8 6 ] 3 : 0 [ j d a r ] 3 : 0 [ j d a f l l a f d n a e s i r l a n g i s t u p t u o r e v i r d e h t e n i m r e t e d h c i h w s t n e r r u c t u p n i . s e m i t 6 2 , 5 7 , 5 3 , 6 6] 3 : 0 [ s a i b d d n a r e v i r d e h t r o f t n e r r u c s a i b l a n r e t n i n a s t e s t a h t t u p n i t n e r r u c g o l a n a . r e w o p l l a r e v o e h t g n i t s u j d a y b e c n a m r o f r e p l l a r e v o s t i l o r t n o c 4 1 , 7 4] 1 : 0 [ i h d _ l e s . h g i h l a c i g o l a n e h w e d o m e v i r d l a i t n e r e f f i d e h t t c e l e s t a h t s t u p n i l t t . e d o m l a i t n e r e f f i d o t ] 1 [ t u o d d n a ] 0 [ t u o d e l b a n e l l i w ] 0 [ i h d _ l e s . e d o m l a i t n e r e f f i d o t ] 3 [ t u o d d n a ] 2 [ t u o d s e l b a n e ] 1 [ i h d _ l e s 0 2 , 1 , 1 4 , 0 6] 3 : 0 [ n o p . n o r e w o p l l i w 1 l a c i g o l . f f o d n a n o r e v i r d e h t s r e w o p t a h t t u p n i l t t s e i l p p u s r e w o p ; 1 5 , 8 5 , 9 5 ; 0 1 , 3 , 2 ; 2 4 , 3 4 0 5 9 1 , 8 1 , 1 1 ] 3 : 0 [ c c v . ) 1 e t o n ( s l e n n a h c r e v i r d r u o f e h t f o h c a e o t y l p p u s r e w o p e v i t i s o p ; 5 5 , 1 6 , 2 6 ; 9 3 , 0 4 , 6 4 ; 6 , 0 8 , 9 7 2 2 , 1 2 , 5 1 ] 3 : 0 [ e e v . ) 1 e t o n ( s l e n n a h c r e v i r d r u o f e h t f o h c a e o t y l p p u s r e w o p e v i t a g e n 3 2 , 8 7 , 8 3 , 3 6] 3 : 0 [ d n g . ) 1 e t o n ( s l e n n a h c r e v i r d r u o f e h t f o h c a e o t d n u o r g e c i v e d s u o e n a l l e c s i m 4 5 , 7e d o n a , e d o h t a c. g n i r t s e d o i d l a m r e h t p i h c - n o e h t f o s l a n i m r e t
3 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 pin description (continued) 80 lead lqfp p 80 lead lqfp p 80 lead lqfp p 80 lead lqfp p 80 lead lqfp p ack ack ack ack ack age age age age age 1 1 1 1 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 .4mm .4mm .4mm .4mm .4mm 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 pon[0] vcc[0] vcc[0] dout[0] dout[0] vee[0] anode dhi*[0] dhi[0] vcc[0] vcc[1] dhi[1] dhi*[1] sel_dhi[0] vee[1] dout[1] dout[1] vcc[1] vcc[1] pon[1] 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 pon[2] vcc[2] vcc[2] dout[2] dout[2] vee[2] cathode dhi*[2] dhi[2] vcc[2] vcc[3] dhi[3] dhi*[3] sel_dhi[1] vee[3] dout[3] dout[3] vcc[3] vcc[3] pon[3] 80 lead mqfp 14 x 14 x 1.4 mm top side
4 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 figure 1. e7 figure 1. e7 figure 1. e7 figure 1. e7 figure 1. e7 7 7 7 7 7 65 de 65 de 65 de 65 de 65 de tailed bloc tailed bloc tailed bloc tailed bloc tailed bloc k diagram k diagram k diagram k diagram k diagram circuit description introduction introduction introduction introduction introduction figure 1 shows a detailed block diagram of the E7765. each of the four drivers has independent signal control and voltage inputs. in addition, each driver has independent power-down ability as well as adjustability for output rising and falling edge speeds. refer to table 1 for a truth table depicting the different modes of operation of an individual channel. table 2 expands on the independent operations with a description of the differential drive mode operation. differential pair[0] consists of drive channels 0 and 1 and are controlled by sel_dhi[0]. differential pair[1] consists of drive channels 2 and 3 and are controlled by sel_dhi[1]. l o r t n o c 0 l e n n a h ct u p t u o s t n e m m o c ] 0 [ i h d] 0 [ n e d] 0 [ n o p] 0 [ t u o d xx 0 f f oe t a t s z i h , r e w o p w o l x0 1 z i h) z i h ( d e l b a s i d r e v i r d 011 l v d i h d w o l l o f , d e l b a n e r e v i r d 111 h v d t t t t t able 1. driv able 1. driv able 1. driv able 1. driv able 1. driv er contr er contr er contr er contr er contr ol t ol t ol t ol t ol t ruth t ruth t ruth t ruth t ruth t able able able able able channels 1, 2 and 3 similar. sel_dhi[0] and [1] at logical low. dbias[0] radj [0] fadj [0] dout[0] fadj [1] radj [1] cathod dout[1] dbias[1] anode dvh[0] dvh[1] den[0] den*[0] den[1] den*[1] pon[0] pon[1] dvl[0] dvl[1] dhi dhi*[0] dhi[1] dhi*[1] sel_dhi[0] sel de de dh dh channel 0 channel 1 dbias[2] radj [2] fadj [2] dout[2] fadj [3] radj [3] dout[3] dbias[3] dvh[2] dvh[3] den[2] den*[2] den[3] den*[3] pon[2] pon[3] dvl[2] dvl[3] dhi[2] dhi*[2] dhi[3] dhi*[3] sel_dhi[1] sel de de dh dh channel 2 channel 3
5 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 circuit description (continued) t t t t t able 2. dif able 2. dif able 2. dif able 2. dif able 2. dif f f f f f erential mode contr erential mode contr erential mode contr erential mode contr erential mode contr ol ? driv ol ? driv ol ? driv ol ? driv ol ? driv er s er s er s er s er s tat tat tat tat tat e t e t e t e t e t ruth t ruth t ruth t ruth t ruth t ables ables ables ables ables diff mode output output sel_dhi[0] dhi[0] den[0] pon[0] dout[0] dhi[1] den[1] pon[1] dout[1] 0 1xx0off x01hiz 1 0 x 0 off x 1 1 dvh[1] 1 1 x 0 off x 1 1 dvl[1] 1001hizxx0off 1011dvl[0]x11dvh[1] 1 1 1 1 dvh[0] x 1 1 dvl[1] 1011dvl[0]x01hiz 1 1 1 1 dvh[0] x 0 1 hiz 1 0 0 1 hiz x 1 1 dvh[1] 1 101hiz x11dvl[1] diff mode output output sel_dhi[1] dhi[2] den[2] pon[2] dout[2] dhi[3] den[3] pon[3] dout[3] 0 1xx0off x01hiz 1 0 x 0 off x 1 1 dvh[3] 1 1 x 0 off x 1 1 dvl[3] 1001hizxx0off 1011dvl[2]x11dvh[3] 1 1 1 1 dvh[2] x 1 1 dvl[3] 1011dvl[2]x01hiz 1 1 1 1 dvh[2] x 0 1 hiz 1 0 0 1 hiz x 1 1 dvh[3] 1 101hiz x11dvl[3] channel 0 control channel 1 control comments differential mode, dout[1] logically follows the complement of dhi[0] sel_dhi[0]=0, channel 0 and channel 1 are independently controlled (see table 1) differential mode, pon and den are independent per channel. differential mode, both channels enabled. differential mode, dout[0] logically follows dhi[0] differential mode, dout[3] logically follows the complement of dhi[2] comments dhi[1] has no effect in differential mode since the channel 1 output will follow the complemented state of dhi[0]. dhi[3] has no effect in differential mode since the channel 3 output will follow the complemented state of dhi[2]. sel_dhi[1]=0, channel 2 and channel 3 are independently controlled (see table 1) differential mode, pon and den are independent per channel. differential mode, both channels enabled. differential mode, dout[2] logically follows dhi[2] channel 2 control channel 3 control
6 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 driv driv driv driv driv er er er er er the driver digital control inputs dhi/dhi* and den/den* are ?flex inputs? ? wide voltage differential inputs capable of receiving ecl, ttl, cmos, or custom level signals. single-ended operation is supported by connecting the non- driven, differential input to the appropriate dc threshold level. differential input drive is recommended for highest performance. drive enable the drive enable inputs (den / den*) control whether the driver is forcing a voltage, or is placed in a high-imped- ance state. if den is more positive than den*, the output will force either dvh or dvl. if den is more negative than den*, the output goes into a high impedance state. the den/den* inputs are independent per drive channel and remain effective in the differential mode. do no do no do no do no do no t lea t lea t lea t lea t lea v v v v v e den / den* floating. e den / den* floating. e den / den* floating. e den / den* floating. e den / den* floating. driver data when the driver is enabled (table 1) the drive data inputs (dhi / dhi*) determine whether the driver output is forc- ing a high or a low. if dhi is more positive than dhi*, the driver will force dvh when the driver is active. if dhi is more negative than dhi*, the driver will force dvl when active. the dhi/dhi* inputs are independent per drive channel, but these input signals for drive channels 1 and 3 are not effective when differential mode is enabled. do no do no do no do no do no t lea t lea t lea t lea t lea v v v v v e dhi / dhi* floating. e dhi / dhi* floating. e dhi / dhi* floating. e dhi / dhi* floating. e dhi / dhi* floating. driver differential mode selection the ttl input sel_dhi will place a pair of drive channels into a differential drive mode. channels 0 and 1 are a differential pair that is independent from the channel 2 and 3 differential pair. circuit description (continued) ] 0 [ i h d _ l e s: m o r f ] 0 [ h d: m o r f ] 1 [ h d 0] 0 [ * i h d / i h d] 1 [ * i h d / i h d 1] 0 [ * i h d / i h d] 0 [ i h d / * i h d sel_dhi[0] = 1 is used for outputting a differential signal where dout[1] is the inverse of dout[0] with the mini- mum of skew, and both drivers respond to the dhi/dhi*[0] signal. more detail is shown in table 2. notice that power- on (pon) and drive enable (den) controls are all still in effect for individual drivers. sel_dhi[1] likewise controls the second pair, channels 2 and 3. driver levels dvh and dvl are high input impedance voltage inputs which establish the driver?s high and low output levels. driver bias the dbias pin is an analog current input which establishes an on-chip bias current, from which other currents are generated. this current, to some degree, also establishes the overall power consumption and performance of the drivers. each driver is given its own dbias control to allow for varying performance among the four drivers. ideally, an adjustable external current source would be used to minimize any part-to-part performance variation within a test system. however, a precision external resis- tor tied to a large positive voltage is typically acceptable. (see figure below.) the optimal dbias current is a func- tion of the radj and fadj settings, and cannot be set in- dependently. the established bias current follows the equation: dbias = (vcc - 0.7) / (rext + 462 ? ). 462 ? rext bias vcc vee
7 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 circuit description (continued) driver slew rate adjustment the driver rising and falling transition times are indepen- dently adjustable. the radj and fadj pins are analog current inputs which establish the driver rise and fall times. ideally, an adjustable external current source would be used for radj and fadj. however, for applications where the rise and fall times are fixed, precision external resis- tors to a positive voltage can be used. the currents into radj and fadj follow the equation: radj, fadj = (vcc - 0.7) / (rext + 550 ? ). the diagrams opposite show how driver rise and fall are adjusted by radj, fadj and dbias. power down of the driver referring to table 1, there are configurations in which a driver can be put into a power down mode, and others in which the driver is powered and ready for operation. pon[0:3] are the ttl inputs controlling power to the indi- vidual driver circuits. a logical 1 will power up the driver. the pon inputs remain effective on a per-driver basis in differential mode. 550 ? rise/fall adjust current radj, fadj vee r ext vc c thermal monitor an on-chip thermal diode string of five diodes in series exists (see figure below). this string allows accurate die temperature measurements. an external bias current of 100 a is injected through the string, and the measured voltage corresponds to a spe- cific junction temperature with the following equation: tj[c] = {(anode ? cathode) / 5 ? 0.768} / (?0.00169). power supply sequencing in order to avoid the possibility of latch-up, the following power-up requirements must be satisfied: 1. vee <= gnd <= vcc at all times 2. vee <= analog inputs <= vcc 3. vee <= digital inputs <= input max voltage or vcc, whichever is less the following sequencing can be used as a guideline when powering up the E7765: 1. vee 2. vcc 3. digital inputs 4. analog inputs the recommended power-down sequence is the reverse order of the power-up sequence. a node cathode temperature coefficient = -7.9 mv / c bias current
8 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 com com com com com puting maximum p puting maximum p puting maximum p puting maximum p puting maximum p o o o o o w w w w w er consum er consum er consum er consum er consum ption ption ption ption ption the diagram below shows the power consumption of the E7765 as a function of power supply and performance bias settings. application information computing the driver output voltage range the output voltage range of the driver at the dout pin is defined by two fundamental calculations. first is the rela- tionship to the power supply voltages at the device (vcc and vee) and second to the range of programmability of the dvh and dvl input voltages. remaining in the calcu- lated output voltage range is required to maintain all the dc and ac accuracy specifications for the driver function. the dout range relative to the power supply voltages is straightforward and depicted in the following figure at the output of the driver. the required dout range must com- ply with the noted headrooms to the vcc and vee power supplies. headrooms larger than noted is also acceptable but must remain within the power supply recommended operating ranges. the dout range is also dependant on the allowable pro- gramming voltages at the dvh and dvl inputs. each of these inputs have similar requirements for power supply headrooms as dout does. these headrooms are also depicted in the figure. furthermore, the dvh/l inputs will have voltage offsets and gain error specifications. these specifications require that the dvh/l input programming range be greater than the required dout voltage range if the worst case offset and gain figures are used. the equa- tion for the resulting minimum and maximum voltage at dout is; v dout(min/max) = v offset(min/max) + [ v in * gain (min) ] solving for vin; v in = [ v dout(min/max) + v offset(min/max) ] / gain (min) to solve for the range of v in , first select the vout ranges required. for example, if we choose -2.0v for the minimum end and +6.5v for the maximum end of v dout , and an off- set min/max of -100mv/+100mv and a minimum gain of 0.975 the equations solve as; for -2.0v; v in(-2v) = [ -2.0v ? 100mv ] / 0.975 = -2.154v for +6.5v; v in(+6.5v) = [ +6.5v + 100mv ] / 0.975 = +6.769v these resulting v in values then need to meet the head- room requirements previously mentioned as well as the absolute (relative to ground) voltage limitations specified in the dc specifications data. vcc 3.5v 4.0v 3.8v 3.7v vee 3.5v 4.0v dvh dvl dout d o u t d v h d v l or t power dissipation covers complete range of supplies (all pon=1) 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 min supplies typ supplies max supplies power (w) high performance lower performance
9 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 application information (continued) . the heatsink and at what angle the air is impacting the heatsink. there are many options available in selecting a heatsinking system. the formula below shows how to cal- culate the required maximum thermal impedance for the entire heatsink system. once this is known, the designer can evaluate the options that best fit the system design and meet the required r . r (heatsink_system) = (t jmax - t ambient - p * jc ) / p where, r (heatsink_system) is the thermal resistance of the entire heatsink system t jmax is the maximum die temperature (100c) t ambient is the maximum ambient air temp expected at the heatsink (c) p is the maximum expected power dissipation of the E7765 (watts) jc is the thermal impedance of the E7765 junction to case (0.8c/w) the graph below uses the power estimates from the previ- ous graph and indicates the required maximum thermal impedances required for the heatsinking system using the above formula with t ambient at 35c. care needs t care needs t care needs t care needs t care needs t o be tak o be tak o be tak o be tak o be tak en when increasing the operating en when increasing the operating en when increasing the operating en when increasing the operating en when increasing the operating dbias, rad dbias, rad dbias, rad dbias, rad dbias, rad j, f j, f j, f j, f j, f ad ad ad ad ad j in j in j in j in j in puts. monit puts. monit puts. monit puts. monit puts. monit oring the die t oring the die t oring the die t oring the die t oring the die t em em em em em pera- pera- pera- pera- pera- ture t ture t ture t ture t ture t o insure adeq o insure adeq o insure adeq o insure adeq o insure adeq uat uat uat uat uat e heatsinking and air e heatsinking and air e heatsinking and air e heatsinking and air e heatsinking and air flo flo flo flo flo w is v w is v w is v w is v w is v er er er er er y y y y y im im im im im por por por por por tant. tant. tant. tant. tant. the power consumption goes up as the power supplies are raised in voltage, and the radj, fadj and dbias set- tings are increased for higher frequency performance. there are specifications and graphs for the relationships of these controls to overall performance in the dc specifi- cations section. refer to them for choosing the settings for a particular system performance. this section deals with how to heatsink the various power dissipation levels. cooling considerations depending on the applied power supply levels and bias conditions the E7765 will use, various methods of heatsinking will be required to keep the maximum die junc- tion termperature within a safe range and below the speci- fied maximum of 100c. the E7765 package has an integral heat slug located at the top side of the package to efficiently conduct heat away from the die to the package top. the thermal resistance of the package to the top is the jc (junction-to-case) and is specified at 0.8c/watt. in order to calculate what type of heatsinking should be applied to the E7765, the designer needs to determine the worst case power dissipation of the device in the appli- cation. the graph above gives a good visual relationship of the range of power dissipation that can be expected from the E7765. the range of power covers the different modes of operation, power supply settings, and performance bias adjustments available. use the data and graphs in subse- quent sections to determine a particular applications power dissipation. another variable that needs to be determined is the maxi- mum ambient air temperature that will be surrounding or blowing on the device and/or the heatsink system in the application (assuming an air cooled system). a heatsinking solution should be chosen to be at or below a certain ther- mal impedance known as r in units of c/watt. the heatsinking system is a combination of factors including the actual heatsink chosen and the selection of the inter- face material between the E7765 and the heatsink itself. this could be thermal grease or thermal epoxy, and they also have their own thermal impedances. the heatsinking solution will also depend on the volume of air passing over more information on heatsink system selections can be read on heatsink vendors? web sites and in the semtech application note #ate-a2 cooling high power, high den- sity pin electronics . required heatsinking thermal resistances covers complete range of supplies (all pon=1) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 min supplies typ supplies max supplies r of heatsink system ( c/w)
10 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 application information (continued) E7765 hookup vees, vccs and gnds of all channels must be connected together. all capacitors shown are 0.1f unless otherwise noted. vee[2] 80,79,6 78 2,3 vcc[2] pon[2] 1 dout[2] 6 dhi[2] 8,9 cathode 7 73-77 dvl/dvh , dbias , radj, fadj[2] 5 69-72 den[0,2] 4 64-68 dvl/dvh , dbias , radj, fadj[0] 5 vee[0] 61,62,55 63 dout[ 0 59,58 vcc[0] pon[0] 60 55 dhi[0] anode 54 52,53 2 2 dout[1 43,42 vcc[1] pon[1] 41 46 dhi[1] 48,49 2 dhi[3] 12,13 2 dout[3] 15 pon[3] 20 18, 19 vcc[3] vee[3] 15,21,22 23 24-28 dvl/dvh, dbias, radj, fadj[3] 5 29-32 den[3,1] 4 33-37 dvl/dvh, dbias, radj, fadj[1] 5 46,40,39 38 vee[1] 10,11 vcc[2,3] 50,51 vcc[0,1] sel_dhi[1] 14 sel_dhi[0] 47 ch[0] ch[3] ch[1] ch[2] 3pf 3pf 3pf 3pf
11 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 package information 1 1 1 1 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 4 x 1 .4 mm, 80-pin lqfp p .4 mm, 80-pin lqfp p .4 mm, 80-pin lqfp p .4 mm, 80-pin lqfp p .4 mm, 80-pin lqfp p ack ack ack ack ack age (die do age (die do age (die do age (die do age (die do wn) wn) wn) wn) wn) (with exposed me (with exposed me (with exposed me (with exposed me (with exposed me tal heat slug) tal heat slug) tal heat slug) tal heat slug) tal heat slug) t t t t t op vie op vie op vie op vie op vie w w w w w notes: 1) all dimensions in mm. 2) dimensions shown are nominal with tol. as indicated. 3) l/f: eftec 64t copper or equivalent, 0.127 mm (.005?) or 0.15 mm (.006?) thick. 4) foot length ?l? is measured at gage plane at 0.25 above the seating plane. 5) lead finish 85/15 sn/pb. d ?a? e n d 1 e 1 exposed heat slug 9.65 .50 dia. heat slug intrusion .0127 max. 1 ?d? ?b? dims. tol. a max 1.60 a 1 .05 min/.15 max a 2 .05 1.40 d .20 16.00 d 1 .05 14.00 e .20 16.00 e 1 .05 14.00 l +.15/-.10 0.60 e basic 0.65 b .05 0.30 0 - 7 ddd max 0.13 ccc max 0.10 a l a 1 a 2 b .25 CcC lead complanarit y seating plan standoff ddd m c aCb s d s ccc c
12 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 absolute maximum ratings stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only, and functional operation of the device at these, or any other conditions beyond those ?recom- mended?, is not implied. exposure to conditions above those ?recommended? for extended periods may affect device reliability. parameter symbol min max units vcc (relative to gnd) vcc 0 11.75 v am1 vee (relative to gnd) vee ?6.5 0 v am2 total power supply vcc ? vee 18.25 v am3 digital input voltages dhi(*), den(*) vee vcc v am5 digital differential input voltages dhi(*), den(*) ?2.5 2.5 v am6 digital ttl inputs sel_dhi, pon ?2.5 vcc v am7 input voltages dvh, dvl vee vcc v am8 current inputs radj, fadj, dbias ?0.5 2.5 v am10 analog input currents radj, fadj, dbias 0 2 ma am12 driver output current iout ?40 40 ma am15 driver swing dvh ? dvl 0 11.5 v am16 storage temperature ts ?65 150 ? cam18 junction temperature tj 125 ? cam19 soldering temperature tsol 260 ? cam20 (5 seconds, .25" from the pin)
13 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 recommended operating conditions note 1: for ?negative? ecl ?flex? inputs (dhi, den) with range down to ?2v input voltage, vee - ?4.75v. note 2: measured at top of package on exposed heat slug. parameter symbol min typ max units positive power supply vcc 8 10 11.6 v negative power supply (note 1) vee ?6.25 ?5 ?4.2 v total analog supply vcc ? vee 12.2 15 17.85 v analog inputs driver bias current dbias 0.6 ma driver slew rate adjustments radj, fadj 0.9 ma thermal resistance of package (note 2) 0.8 ? c/w junction temperature tj 40 100 ? c
14 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 dc characteristics (continued) parameter symbol min typ max units control inputs (sel_dhi, pon) input low level vil 0 0.8 v input high level vih 2 5 v input bias current iin ?50 50 a parameter symbol min typ max units driver circuit output ran g edout ? 2.0 +7.0 v dout vee + 3.7 vcc ? 3.8 v a nalo g inputs high level dvh vee + 4.0 vcc ? 3.5 v dvh ?1.5 +7.4 v low level dvl vee + 3.5 vcc ? 4.0 v dvl ?2.25 +6.5 v driver swin g doutsw 0.1 8.0 v input current i_in ? 35 +35 a driver bias dbias 0.5 1.5 m a slew rate adjustments radj, fadj 0.3 1.5 m a radj, fadj, dbias volta g e compliance vdbias, vradj, vfadj ? 0.2 +2.0 v driver output (note 1) dc output current imax ? 35 +35 m a output impedance (@ 25ma) (note 3) rout 4.0 4.7 8.0 ? hiz leaka g e ( driver hiz, powered up ) ? 1+1a hiz leakage (driver hiz, powered down) ? 500 +500 na dc accurac y ( note 1 ) {design_spec: determine offset + gain} offset volta g e (@ dvh = dvl = 0 ) dvh, dvl ? dout ? 265 +265 mv offset tempco (dvl = 0v, dvh = 3v) ? dout/c 0.5 mv/c gain (measured @ allowable ?fs and +fs) ? dout/ ? dvh, ? dout/ ? dvl 0.965 1.0 v/v linearity (full range @ 0v and 75% of dvh/l max input calibration points) (note 4) dout inl ?10 +10 mv digital inputs (dhi/dhi*, den/den*) in p ut volta g e ran g e ( note 2 ) dhi ( * ) , den ( * ) ? 2.0 +5.0 v differential in p ut swin g | in p ut ? in p ut* | 0.24 2.0 v in p ut current iin ? 300 +300 a input capacitance cin 3.0 pf
15 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 dc characteristics (continued) dc conditions: dvl = 0v, dvh = 3v, sel_dhi[0:1] and dhi[0:3] at logical low. dbias = 0.6ma, radj = fadj = 0.9ma. dc conditions (unless otherwise specified): over the full "recommended operating conditions". note 1: see applications section describing the applicable ?driver output range? as a function of vcc and vee. note 2: digital input voltage range also > vee + 2.75v. note 3: the typical value for rout should be used to calculate the external resistor for matching to the application?s transmission line impedance. note 4: the 2-point calibration for full range should be done at 0v and 75% of the maximum dvh and dvl input. while the 1st calibration point (0v) will be the same for both dvh and dvl, the 2nd calibration point will be different (ie. dvh: 75% * (vcc - 3.5), dvl: 75% * (vcc - 4.0)). parameter symbol min typ max units power supply currents all drivers powered on ( pon = 1 ) positive su pp l y icc 390 430 m a negative supply iee ?490 ?450 ma all drivers powered down ( pon = 0 ) positive su pp l y icc 340 370 m a negative supply iee ?420 ?350 ma
16 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 dc characteristics (continued) highest performance total power curves 5 6 7 8 9 10 11 12 minimum typical maximum power supply settings power (w) pon = 1 pon = 0 lower performance total power curves pon=1 pon=0 3 4 5 6 7 8 minimum typical maximum power supply settings power (w)
17 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 ac characteristics a a a a a c t c t c t c t c t est cir est cir est cir est cir est cir cuit cuit cuit cuit cuit cv g n i w s f p 3) l c e ( v 8 . 0 f p 3) s d v l ( v 3 . 0 f p 5) l t t v l ( v 0 . 3 f p 8) l t t / s o m c ( v 0 . 5 953 ? 45.3 ? 50 ? dout 50 ? transmission line (20 inches, ~2 ns) oscilloscope (rl) c 3pf
18 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 ac characteristics (continued) ac test conditions (unless otherwise specified): "recommended operating conditions". vcc = +10v, vee = ?5v. note 1: propagation delays for lv_pecl differential logic inputs. note 2: at 10% output amplitude attenuation. cload in ac test circuit = 0 pf. note 3: 0 to 800 mv outputs. parameter symbol min typ max units driver circuit (dbias = 0.6ma) (radj = fadj = 0.9 ma unless otherwise noted) output impedance (@ 25ma over temperature and power supplies) rout 4.0 6.0 8.0 ? propagation delay (0 to 1v output) (note 1) data (dhi) to output (figure 5) tplh, tphl 0.5 1.5 ns output active to hiz (figure 4) tpaz 0.75 1.5 ns hiz to output active (figure 4) tpz a 1.0 2.0 ns rise/fall times (figure 6) 0 to 1v (20% - 80%) tr/tf 0.13 0.25 ns 0 to 3v (10% - 90%) tr/tf 0.55 0.6 ns crossover voltage error (figure 9) vxover 45 55 % fmax (r l =50 ? , swing=programmed value) (note 2) (figure 7) 0 to 1v fmax 1200 1300 mhz 0 to 3v fmax 600 700 mhz pulse width (r l =50 ? , swing=programmed value) (note 2) (figure 3) tpw 0 to 1v 0.6 ns 0 to 3v 0.9 ns pulse width dispersion to minimum pulse width ? tpw 50 ps (pwmin = 0.5 ns, 50 ? terminated) (figure 2) driver-to-driver skew (diff. driver mode) (note 3) 10 30 ps output capacitance cout 4.6 pf delay tempco (figure 5) (switching dvh and dvl) ? tpd/ ? c11.5ps/ ? c delay symmetry (same driver, 1.0v swing) (figure 5) |tphl ? tplh| 50 ps trans. time matching (same driver) (figure 6) dout = 1.0v ? tr,f 50 ps dout = 3.0v ? tr,f 100 ps overshoot/undershoot (figure 8) dout = 1.0v 0 300 mv dout = 3.0v 0 250 mv ringback (figure 8) dout = 1.0v 250 mv dout = 3.0v 150 mv voltage crosstalk (when switching adjacent channel) dout = 1.0v 9 20 mv dout = 3.0v 12 30 mv timing crosstalk dout = 1.0v 12 ps dout = 3.0v 30 ps
19 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 note 1: includes the time needed to settle new drive levels to within 10% of programmed values. ac characteristics (continued) parameter symbol min typ max units control logic sel_dhi (note 1) t diff_d 50 ns
20 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 ac characteristics (continued) figure 2. driv figure 2. driv figure 2. driv figure 2. driv figure 2. driv er din t er din t er din t er din t er din t o out disper o out disper o out disper o out disper o out disper sion measurement def sion measurement def sion measurement def sion measurement def sion measurement def inition inition inition inition inition figure 3. driv figure 3. driv figure 3. driv figure 3. driv figure 3. driv er minimum pulse width measurement def er minimum pulse width measurement def er minimum pulse width measurement def er minimum pulse width measurement def er minimum pulse width measurement def inition inition inition inition inition the measured result is the absolute value of the change in [tpw,in ? tpw,out] as the p.w. changes from 25 ns to the end points of pw min and [50ns ? pw min ]. period = 50 ns tpw, in1 = 50 ns - pwmin tpw, in2 = pwmin (dhi - dhi*) out time time output: out(h) = 0.8v; out(l) = 0.0v tpw,in1 tpw,in2 tpw,out2 tpw,out1 0.0v 0.0v 0.4v ? tpw = |(tpw,in1 - tpw,out1) - (tpw,in2 - tpw,out2)| voh vol + 0.9 * (voh?vol) (voh+vol)/2 vol + 0.1 * (voh?vol) vol out time tpw+ tpw? output signal period = 100 ns
21 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 ac characteristics (continued) figure 5. driv figure 5. driv figure 5. driv figure 5. driv figure 5. driv er tpd: dhi t er tpd: dhi t er tpd: dhi t er tpd: dhi t er tpd: dhi t o out o out o out o out o out , symme , symme , symme , symme , symme tr tr tr tr tr y y y y y , and t , and t , and t , and t , and t rac rac rac rac rac king sk king sk king sk king sk king sk e e e e e w measurement def w measurement def w measurement def w measurement def w measurement def inition inition inition inition inition figure 4. driv figure 4. driv figure 4. driv figure 4. driv figure 4. driv er hiz enable/disable dela er hiz enable/disable dela er hiz enable/disable dela er hiz enable/disable dela er hiz enable/disable dela y measurement def y measurement def y measurement def y measurement def y measurement def inition inition inition inition inition out d vh dvl (den - den*) time time output: dvh = 0.8v, dvl = 0.8v tpza tpaz 0.0v 0.0v +800mv 800mv 90% 90% 10% 10% (r load at dout = 50 ? to gnd) (dhi ? dhi*) tim e tim e 0.0v 0.0v out tplh tphl +0.8v +0.4v output: out(h) = 0.8v; out(l) = 0.0v
22 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 ac characteristics (continued) figure 6. driv figure 6. driv figure 6. driv figure 6. driv figure 6. driv er t er t er t er t er t ransition times and t ransition times and t ransition times and t ransition times and t ransition times and t ransition time matc ransition time matc ransition time matc ransition time matc ransition time matc hing measurement def hing measurement def hing measurement def hing measurement def hing measurement def inition inition inition inition inition figure 7 figure 7 figure 7 figure 7 figure 7 . driv . driv . driv . driv . driv er fmax measurement def er fmax measurement def er fmax measurement def er fmax measurement def er fmax measurement def inition inition inition inition inition 0.0v out out(h) tim e 1 / fmax 0.90 out(h) out time out(h) v1 v2 tr tf 0.0v v1 is 0.9 * out(h) for 3v and 5v, 0.8* out(h) for 0.8v and lower v2 is 0.1 * out(h) for 3v and 5v, 0.2* out(h) for 0.8v and lower
23 test and measurement products ? 2006 semtech corp. , rev. 11, 7/18/06 www.semtech.com E7765 ac characteristics (continued) figure 8. driv figure 8. driv figure 8. driv figure 8. driv figure 8. driv er ov er ov er ov er ov er ov er er er er er shoo shoo shoo shoo shoo t, u t, u t, u t, u t, u nder nder nder nder nder shoo shoo shoo shoo shoo t, and ringbac t, and ringbac t, and ringbac t, and ringbac t, and ringbac k k k k k figure 9. driv figure 9. driv figure 9. driv figure 9. driv figure 9. driv er output cr er output cr er output cr er output cr er output cr osso osso osso osso osso v v v v v er v er v er v er v er v oltage measurement oltage measurement oltage measurement oltage measurement oltage measurement dvh to dvl 800 mv 0v x over dvl to dvh v2 v1 out 0.0v undershoot overshoot ringback ringback test cases: v1:v2 = dvl:dvh = dvt:dvh = dvl:dvt
24 ? 2006 semtech corp. , rev. 11, 7/18/06 test and measurement products www.semtech.com E7765 ordering information r e b m u n l e d o me g a k c a p f x a 5 6 7 7 e p f q l n i p - 0 8 , m m 4 . 1 x 4 1 x 4 1 g u l s t a e h d e s o p x e h t i w f x a 5 6 7 7 m v ed r a o b n o i t a u l a v e 5 6 7 7 e g d e contact information semtech corporation test and measurement division 10021 willow creek rd., san diego, ca 92131 phone: (858)695-1808 fax (858)695-2633

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